In communication systems, a goal is to transport information from one physical location to another. It is typically desirable that the transport of this information is reliable, is fast and consumes a minimal amount of resources. One common information transfer medium is the serial communications link, which may be based on a single wire circuit relative to ground or other common reference, or multiple such circuits relative to ground or other common reference. A common example uses singled-ended signaling (“SES”). SES operates by sending a signal on one wire, and measuring the signal relative to a fixed reference at the receiver. A serial communication link may also be based on multiple circuits used in relation to each other. A common example of the latter uses differential signaling (“DS”). Differential signaling operates by sending a signal on one wire and the opposite of that signal on a matching wire. The signal information is represented by the difference between the wires, rather than their absolute values relative to ground or other fixed reference.
There are a number of signaling methods that maintain the desirable properties of DS while increasing pin efficiency over DS. Vector signaling is a method of signaling. With vector signaling, a plurality of signals on a plurality of wires is considered collectively although each of the plurality of signals might be independent. Each of the collective signals is referred to as a component and the number of plurality of wires is referred to as the “dimension” of the vector. In some embodiments, the signal on one wire is entirely dependent on the signal on another wire, as is the case with DS pairs, so in some cases the dimension of the vector might refer to the number of degrees of freedom of signals on the plurality of wires instead of exactly the number of wires in the plurality of wires.
Any suitable subset of a vector signaling code denotes a “subcode” of that code. Such a subcode may itself be a vector signaling code. With binary vector signaling, each component or “symbol” of the vector takes on one of two possible values. With non-binary vector signaling, each symbol has a value that is a selection from a set of more than two possible values. The set of all values required to represent all symbols is called the “alphabet” of the code. Thus, as examples, a binary vector signaling code requires at least an alphabet of two values, while a ternary vector signaling code requires at least an alphabet of three values. When transmitted as physical signals on a communications medium, symbols may be represented by particular physical values appropriate to that medium; as examples, in one embodiment a voltage of 150 mV may represent a “+1” symbol and a voltage of 50 mV may represent a “−1” symbol, while in another embodiment “+1” may be represented by 800 mV and “−1” as −800 mV.
A vector signaling code, as described herein, is a collection C of vectors of the same length N, called codewords. The ratio between the binary logarithm of the size of C and the length N is called the pin-efficiency of the vector signaling code. The Orthogonal Differential Vector Signaling or ODVS codes of [Cronie I], [Cronie II], [Fox I], [Shokrollahi I], [Shokrollahi II], and [Shokrollahi III] are examples of vector signaling codes, and are used herein for descriptive purposes.
Inter-symbol interference (ISI) is the distortion of a symbol to be decoded at the receiver by the residual effects of symbols previously sent through the system. This effect is mainly due to properties of the underlying communication channel, and often is the limiting characteristic precluding higher speed or lower error communications. Well-known examples of channels vulnerable to ISI include wireless communications with multipath interference and band-limited channels in wired systems. Since ISI degradation is deterministic, it is advisable to cancel its effect before trying to decode the current symbol to obtain its embedded information. In some cases, a sequence of previously-sent symbols that constructively combine to maximize their impact on the detection margin of the current symbol. Since these worst-case symbol patterns usually occur with a high probability compared to the target error-rate of the system, their effect and how to quantify and minimize their destructive behavior is a major concern in the design of communication systems. Beyond such ad-hoc identification of problematic patterns, there is no reliable metric to assess the impact of ISI on communications system performance, nor to suggest channel or coding modifications to mitigate such effects.
One way to combat the ISI problem is to use equalizers which render the equivalent channel ISI-free. Equalizers are functional processing blocks or circuits that try to invert the channel in such a way that the transmitted data at each symbol interval becomes (ideally) independent of the other symbols sent through the system. In a Serializer-Deserializer (SerDes) design, FIR (Finite Impulse Response filtering) and CTLE (Continuous Time Linear Equalization) are two well-known linear equalization methods used respectively at the transmitter and receiver sides of the system while DFE (Decision Feedback Equalization) is a receiver-side non-linear equalization method. Other equalization methods such as the Tomlinson-Harashima precoding method are also known to practitioners of the field. Such pre-coding is often equivalent to equalization at the transmitter. On one hand, equalizers can be expensive in terms of implementation complexity, power consumption, and calibration requirements, especially in multi-gigabit/s communication systems. Thus, there is a need for both metrics that accurately reflect the impact of ISI on communications system performance, and for channel processing solutions that mitigate ISI effects in an efficient, high performance manner.